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India’s Milestone in Semiconductor R&D, IIT urban center demonstrates Memory Technology on 180nm CMOS method

·        The natural world is analog while computing is digital.

·        Computers understand the plants through detector chips whose output is analog.

·        The analog output is converted into the language of computers through a digitizer chip or an analog to digital converter (ADC).

·        The generic chips will currently be styleed and application-specific offsets intercalary to form pricey custom chip design redundant, saving time and cash for the user.

·        IIT Bombay partnered with SCL to successfully demonstrate CMOS 180nm based production-ready 8-bit memory technology.

·        The 180 nm process refers to the level of MOSFET (CMOS) semiconductor process technology that was commercialized around the 1998–2000 timeframe by leading semiconductor companies The Government of India took cognizance of the significance of R&D in innovation driven semiconductor manufacturing, at IIT Bombay and the Indian Institute of Science.

·        The team at IIT urban center was supported by the Department of Science and Technology’s Intensification of analysis in High Priority space (IRHPA).

·        Aspects of the work were funded by MeitY/DST’s Nano electronics Network for Research and Applications (NNetRA) Advantage of CMOS 180nm.

·        The chip uses one-time programmable (OTP) memory supported ultra-thin deposited oxide (a few atoms thick) rather than the present gate oxide-based OTP technology.

·        In distinction to the high voltage needed by gate compound breakdown (a standard OTP memory), IIT Bombay’s micro chip needs less power and chip-area because the want for boosted voltage provide is avoided.

·        The Memory technology is critical to data security.

·        It will be a game changer by enabling secure memory and encryption hardware for the country

 


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